• eine box wie dvd box aber ohne dvd zeichen und es ist ein FB Baustein für Tia Poertal der den ablauf überwacht immer wieder punktgenau um fehler zu erkennen und zu warnen "Siemens " nicht verwenden
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Process monitoring

€349,00 EUR
€349,00 EUR
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Description

The SequenceLearnCompare_FB function block learns a sequence of signal states (10 digital, 4 analog, and 2 integer values) with timestamps and later compares them with live data at cycle-accurate intervals. Each state change is recorded as a step (timestamp, DI/AI/INT snapshot). In compare mode, a step-by-step check is performed to determine whether the expected changes occur within a configurable time window ( #TimeTolerance ) and whether the values ​​match. Deviations are logged with unique error codes and reported clearly as text.

Note: The module is used for process validation/quality assurance and does not replace any safety-related functions.

How it works
Timebase & Reset
  • Time base: The internal millisecond counter #TimerMs is increased by 10 ms per cycle ( STEP 0 ).
  • Reset: Resets all indices, counters, and status ( #LearnIndex , #CompareIndex , #ErrorIndex , #ErrorCount , #MismatchIndex = -1 , flags, error code array). Ends processing in the current cycle ( RETURN ).
Learning mode
  • Start: Edge on #StartLearning activates #IsLearning , sets #LearnIndex := 0 , #TimerMs := 0 , #ForceFirstLearn := TRUE .
  • Change detection: A step is recorded when any channel has changed from #LastDI/AI/INT or #ForceFirstLearn is active.
  • Step recording: Saves Timestamp = #TimerMs and snapshots of all 10 DI, 4 AI and 2 INT in #LearnSteps[#LearnIndex] ; updates #Last* ; #LearnIndex ++.
  • Limit: Maximum 100 learned steps ( #LearnIndex < 100 ).
  • End: When #StartLearning is released, the block sets #LearningDone := TRUE and #IsLearning := FALSE .
Comparison mode
  • Start: Edge on #StartCompare activates #IsComparing , sets #CompareIndex := 0 , #ErrorIndex := 0 , #TimerMs := 0 , #Match := TRUE , #ForceFirstCompare := TRUE ; clears error list.
  • Window: A time window [expectedTime - TimeTolerance, expectedTime + TimeTolerance] applies to each step, where expectedTime = #LearnSteps[#CompareIndex].StepRecord.Timestamp . Lower limit: at least 0.
  • Live change: Only when changes are detected (as in learning mode) a comparison snapshot #CRec is created and evaluated.
  • Timing check: Deviation |#CRec.Timestamp - expectedTime| > #TimeTolerance ⇒ Error code 4000 + #CompareIndex .
  • Signal checks:
    • DI: Inequality ⇒ Code 1000 + step * 10 + diIndex .
    • AI: Absolute difference > 0.01 ⇒ Code 2000 + step * 10 + aiIndex .
    • INT: Inequality ⇒ Code 3000 + step * 10 + intIndex .
  • No event in window: If #TimerMs exceeds the window end, without change ⇒ Code 4900 + step ; step is still counted as completed.
  • Termination: End when #CompareIndex >= #LearnIndex or when 10 errors have been detected. Then #CompareDone := TRUE , #IsComparing := FALSE , #ErrorCount := #ErrorIndex .
Diagnostic message texts

If #ErrorCount > 0 a plain text is generated from the first error code:

  • 1xxx → DI error in step S
  • 2xxx → AI error in step S
  • 3xxx → INT error in step S
  • 4xxx → Time error in step S
  • Otherwise → Unknown error code

No errors: Comparison successful – no discrepancy (if #CompareDone and #Match ), otherwise no error . The #HasError flag is set accordingly.

Technical details
  • Channels: 10× DI, 4× AI (REAL), 2× INT
  • Learning memory: Up to 100 steps ( #LearnSteps[0..99] ) with Timestamp and snapshots
  • Error list: Up to 10 entries ( #ErrorCodes[0..9] ), #ErrorCount , #MismatchIndex (first deviating step)
  • Tolerance: #TimeTolerance (TIME), Comparison threshold AI: 0.01
  • Timebase: #TimerMs (INT/DINT-based), Increment: 10 ms/cycle
  • Control flags: #StartLearning , #LearningDone , #StartCompare , #CompareDone , #Match , #HasError
Error codes (mapping)
  • 1000 + step * 10 + diIdx → DI mismatch (diIdx 0..9)
  • 2000 + step * 10 + aiIdx → AI deviation > 0.01 (aiIdx 0..3)
  • 3000 + step * 10 + intIdx → INT mismatch (intIdx 0..1)
  • 4000 + step → Time deviation of the event > Tolerance
  • 4900 + step → No change in time window (event missed)
Possible applications
  • Process recording and subsequent reproducibility/end-of-line testing
  • Process comparison after repair or parameterization
  • Quality assurance (step chain validation)
  • Error analysis with first deviation step ( #MismatchIndex )
compatibility
  • Siemens TIA Portal V16 (S7-1200/1500), SCL
  • Can be used with PLCSIM for testing and validation purposes
Scope of delivery
  • SCL block SequenceLearnCompare_FB (code according to the behavior described above)
  • Commented interfaces and error matrix
  • Quick start guide (learning/testing/diagnosis)
Support

Support with:

  • Adjusting the number of channels, AI thresholds or tolerances
  • Extension of error codes and diagnostic outputs (e.g. more than 10 errors)
  • Export/logging of steps and results (e.g. to DB or file)
  • Integration into existing plant sequences and HMI messages