SmartLogicPro
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Description
The SmartLogicPro_FB function block is a universal logic block for Siemens PLC systems (e.g., S7-1200 in TIA Portal V16). It has five individually configurable inputs, each of which can be used as AND or OR inputs. Additional options for inversion, time delay (TON/TOF), timeout monitoring, and a global enable input are available. The block automatically detects whether AND, OR, or combined logic is being used and generates the output signal accordingly. An integrated counter records changes at the output.
Note: This module is universally applicable, but does not replace safety-related functions. Project-specific adaptation, verification, and approval by qualified personnel are required before productive use.
How it works
Reset / Initialization
At startup, internal variables are reset. #AND_Group
is set to TRUE and #OR_Group
to FALSE, allowing correct logic calculation from the start. Error and usage flags ( #ErrorTimeout
, #UseAND
, #UseOR
) are also reset.
Input processing
The following applies to each of the 5 input channels:
-
Activation: Processing only if
Enable
is set for the channel. - Inversion: The input signal can optionally be inverted.
-
Time delay: Selection between
TON
(switch-on delay) orTOF
(switch-off delay) with configurable time (PT
). -
Timeout monitoring: An internal timer object monitors whether an input remains inactive longer than the configured timeout. If an error occurs,
#ErrorTimeout
is set. - Logic assignment: The input is assigned to either the AND or OR group and considered accordingly.
Logic calculation
The output logic depends on which groups are active:
- AND and OR active → combination of both groups:
#Q_raw = AND_Group AND OR_Group
- Only AND active →
#Q_raw = AND_Group
- Only OR active →
#Q_raw = OR_Group
- No inputs active →
#Q_raw = FALSE
Release & Exit
The global input #FreeRunEnable
acts as a safety enable. If it is not set, the output is forced to false regardless of the logic.
With each state change of #Q_raw
, #ChangeCount
is incremented. Time-delayed outputs ( #Q_TON
, #Q_TOF
) are also available.
Technical details
-
Inputs: 5 channels (
#InputChannels[1..5]
) with the parametersEnable
,Value
,Invert
,UseTON
,PT
,Timeout
,UseAsAND
; global:#FreeRunEnable
-
Internal logic:
#AND_Group
,#OR_Group
, timeout monitoring, flags for group detection -
Outputs:
#Q
(logical result),#Q_TON
,#Q_TOF
-
Status & Diagnostics:
#ErrorTimeout
(timeout error),#ChangeCount
(counter for state changes) - Logic types: AND, OR, combined AND/OR
Possible applications
- Flexible combination of input signals in the control logic
- Simulation of complex logic with time delay and timeout
- Monitoring of sensor signals with error detection
- Universal logic module for standard controllers
Note: Not suitable for safety-related applications.
compatibility
- Siemens TIA Portal V16 (S7-1200, S7-1500)
- Supports SCL (Structured Control Language)
- Easily expandable to more inputs or additional logic types
- Can be used in standard PLC programs
Scope of delivery
You will receive:
- An SCL file with the implemented function block SmartLogicPro_FB
- Detailed declaration of all inputs and outputs
- Commented logic for each processing level
- Short guide for integration into your own control projects
Support
I support you with:
- Adapting the input logic to your machine or system
- Integration into existing control architectures
- Extension to additional functions (e.g. more inputs, priority logic)
- Error analysis and optimization in simulation and live operation
Contact is possible via shop message or email. Individual adjustments are available as customization options.